Tuesday, 15 October 2013

LPCEXPRESSO :: Library not found.

 I have copied my workspace to other location. Workspace contain main project and associated libraries.
When i have compiled the main project, following error occured.


c:/nxp/lpcxpresso_5.2.6_2137/lpcxpresso/tools/bin/../lib/gcc/arm-none-eabi/4.6.2/../../../../arm-none-eabi/bin/ld.exe: cannot find -llib_FatFS
collect2: ld returned 1 exit status
make: *** [test-FatFS.axf] Error 1


To solve this problem, Press F5 and then build all projects.

Friday, 11 October 2013

Semiconductor Companies Welcome Node In India

Sept. 13:  
The Government on Friday said the first ‘Made-in-India’ chip would be rolled out in the next two-three years.
This follows Cabinet’s decision to approve two fabrication units for which the Government will give tax breaks and subsidies.
The Government will invite other global companies to avail themselves of the incentives.

Two proposals

On Thursday, the Cabinet had approved two proposals of which one is a consortium formed by Jaiprakash Associates along with IBM and Tower Jazz of Israel.
The outlay of the proposed fab is around Rs 26,300 crore to establish the facility of 40,000 wafer per month. Technology nodes proposed are 90, 65 and 45 nanometre (nm) nodes in Phase I, 28 nm node in Phase II with the option of establishing a 22 nm node in Phase III. The proposed location is Greater Noida.
The second consortium is formed by Hindustan Semiconductor Manufacturing Corporation along with ST Microelectronics (France/Italy) and Silterra (Malaysia). The outlay of the proposed fab is around Rs 25,250 crore for the facility of 40,000 wafer starts per month of 300 mm size.
Technology nodes proposed are 90, 65 and 45 nm nodes in Phase I and 45, 28 and 22 nm nodes in Phase II. The proposed location is Prantij, near Gandhinagar, Gujarat.
“The Government will pick 11 per cent equity in the said projects,” Kapil Sibal, Communications and Information Technology Minister, told reporters here.
The Government has also required the technology providers to take equity of at least 10 per cent in the proposed projects. The fab facilities will be eligible for investment-linked deduction under Section 35AD of the Income Tax Act, which will provide viability gap funding in the form of an interest free loan for 10 years.
“The only way you can actually attract such investment, is by giving a large concessions other wise they are not willing to come. Chips have a global market and wherever companies are there, they can sell because there is zero duty and there is no cost on freight,” Sibal said.
He said there are security considerations also because such chips are also used in atomic, space and power sectors, adding that if it is manufactured here, it will serve the strategic purposes.
“We have the top design engineers in the world. We have been trying to set up a fab for many years and every time we have failed. Last time, Intel was here and Government of India then could not give kind of concessions that they wanted so they went to Vietnam,” he said.
The Government had in 2011 constituted an Empowered Committee to identify technology and investors and to recommend incentives to be provided to set up two fab facilities in the country.

32 firms invited

It had sent invitations to 32 global companies, out of which 16 responded and ultimately the two consortia showed interest to invest in India.